Design of a power optimal reversible FIR filter for speech signal processing

In this paper, an efficient architecture of FIR filter structure is presented. For achieving low power, reversible logic mode of operation is implemented in the design. Area overhead is the tradeoff in the proposed design. From the synthesis results, the proposed low power FIR filter architecture offers 18.1 % of power saving when compared to the conventional design. The area overhead is 2.6% for the proposed architecture.