Design and analysis of neuromemristive echo state networks with limited-precision synapses

Echo state networks (ESNs) are gaining popularity as a method for recognizing patterns in time series data. ESNs are random, recurrent neural network topologies that are able to integrate temporal data over short time windows by operating on the edge of chaos. In this paper, we explore the design of a hardware ESN with bi-stable memristor-based synapses. Hybrid CMOS/memristor hardware implementations of ESNs are able to exploit non-linear device physics, improving power consumption, and boosting performance over software approaches. However, the digital nature of most experimental memristors places a limit on the precision of weight states in the ESN's readout layer. In spite of this, we show that ESNs with only 5 different readout layer weight states can acheive 67% accuracy in spoken digit recognition tasks.