A 23ps resolution Time-to-Digital converter implemented on low-cost FPGA platform

This paper presents a low-cost implementation and measurement setup of an accurate Time-to-Digital converter (TDC). The design was realized using ring oscillator-based TDC architecture. The circuit consists of two ring oscillators having slightly different frequencies. The TDC accuracy is determined by the difference between the periods of the two oscillators. Since that the silicon prototyping is costly and time consuming, the design was implemented and tested on low-cost Xilinx Spartan-3AN field-programmable gate array (FPGA) platform. In addition, a low-cost, yet accurate, measurement platform is presented. The post synthesis simulation and measurement results showed that the design was capable of measuring a pulse width as narrow as 23 pSec. The design is intended to be used in low-power low-cost level-crossing analog to digital converters.