Performance evaluation of clamping position variation on advanced bus clamping strategies: Experimental investigation

This paper evaluates the performance of conventional and advanced discontinuous space vector pulse width modulation(PWM)with the variation in placement of clamping position (zero vector changing angle). Conventional space vector pulse width modulation (CSVPWM) employs continuous switching sequence, which equally divides the two zero vector in every sub cycle. Bus clamping PWM (BCPWM) techniques uses discontinuous sequence in a sub cycle. Clamping method reduces the inverter switching losses and the line current distortion. This work brings out the performance of BCPWM techniques which employs the different location of the phase clamping. The line current distortion is considered as the main performance index for analysis. The different SVPWM switching strategies are implemented on a 415V, 2hp, 50Hz, 3-phase induction motor drive which is fed from an IGBT based 2 KVA voltage source inverter(VSI) with a DC bus voltage of 400 V A low cost PIC microcontroller (PIC18F452)is used as the controller platform. The experimental results shown that the clamping position of a phase has significant role in the reduction in line current harmonics at various power factor angles. The comparative results for clamping strategies for variation in zero vector changing angle reveals that the advanced split clamped SVPWM strategy has less total harmonic distortion compared to the other strategies.