P-channel Tunneling Field Effect Transistor (TFET): Sub-10nm technology enablement by GaSb-InAs with doped source underlap

Summary form only given. This work proposes sub-10nm p-TFET showing sub-60 mv/dec SS for several orders of current. An 8-T SRAM cell evaluation indicates that TFETs can perform like FinFETs near-threshold voltages while consuming 100x lower standby power.