CMOS compatible integrated ferroelectric tunnel junctions (FTJ)

As traditional CMOS scaling reaches fundamental limits, there is an increasing interest in non-charge based beyond CMOS devices that could increase the functionality of logic chips [1]. Ferroelectric tunnel junction (FTJ) devices are attractive due to their large ON/OFF ratios, non-volatile, and low energy operation [2]. Switching has been demonstrated in the metal-ferroelectric-metal (M-F-M) FTJs in non-integrated devices that use the conductive atomic force microscope (AFM) tip as an electrode [3-4]. However, it is necessary to investigate the CMOS compatibility, scalability, switching speed and switching dynamics in an integrated FTJ device. We report a CMOS compatible integrated FTJ fabrication process that is scalable from micron to deep submicron dimensions. The first generation integrated FTJs show switching with peak ON/OFF ratio of 60. We also report the scalability of the ferroelectric polarization loop to 550 nm × 550 nm device. Conductivity degradation of the La_xSr_1-xMnO₃ (LSMO) bottom conductor is observed due to reactive ion etch (RIE) process that impacts device performance.