Implementation using VHDL of an ECG signal using CSP

An electrocardiogram (ECG) is used for recording the electrical inherent exertion of heart. It records the cyclic series of heart pulse. To distinguish the ailment in heart, a Cardiac Signal Processor (CSP) is used. The action is done by taking the aid which is in analog form is later converted to digital form. This digital form is stocked in the memory cache. A single complete heart signal is consigned to CSP. After undergoing different steps of procedure the output is taken and compared to match with memory cache. At last the heart ailment will be detected and curing of this ailment will be suggested by the physicians.