Time to digital conversion zero crossing DPLL (TDC-ZCDPLL)

The objective of this work is to introduce and analyze the performance of the newly proposed second order Time to Digital Conversion (TDC) based Zero Crossing Digital Phase Locked Loop (TDC-ZCDPLL). The introduction of the TDC as Phase Detector (PD) widens the lock range of a ZCD-PLL and improves the loop's operation linearity and stability. The second order digital filter tap coefficients affect the loop convergence and stability behaviour, so careful selection of those gains should be taken into consideration. The proposed loop has wider lock range, faster acquisition time. The TDC-ZCDPLL lock range does not depend on the input frequency which is a major advantage compared to the conventional ZCDPLL which has this dependency. This will give the TDC-ZCDPLL a preference when used in frequency synthesizers systems or in frequency hopping spread spectrum communications (FHSS).