Behavioral fault simulation of large mixed-signal UUTs using the Saber simulator

The use of behavioral simulation in the design of large printed circuit boards and systems is well known. Using behavioral models of complex or large circuitry in a top-down design methodology, designers can simulate and analyze their systems in a reasonable time. While a single simulation of such systems at the primitive, or element, level may take hours, or even days, a behavioral simulation may take only minutes and still provide sufficient detail of the system's operation. These same techniques can be applied to fault simulation of large or complex UUTs. Simulating faults for the purpose of developing an efficient sequence of tests to be run on the ATE involves multiple simulation runs and potentially long simulation times due to the insertion of the faults. Using behavioral modeling and top-down analysis can help keep simulation times reasonable for large systems. The most critical task in creating the behavioral model of a large system is to decide which effects need to be simulated to provide an accurate picture of system operation and still provide enough detail to allow required analyses. This paper examines the established principles of top-down design and show how they can be applied to simulation and analysis of faults for TPS development. A forward converter switching power supply, which can have very long simulation times at the primitive level, is used to demonstrate the technique.