Design and synthesis of bandwidth efficient QPSK modulator for low power VLSI design

In recent years digital designs have been highly automated, and the digital modulation provides more information capacity, compatibility, higher data security, better quality communications and quicker system availability with digital services. This paper proposes a QPSK module based on π/4 modulation technique. A simulative investigation on the bandwidth efficiency of the QPSK modulator has been implemented with the proposed technique; and thereby compared with the conventional BPSK modulation scheme. Synthesis and implementation of QPSK modulation technique is described viz. subsystem modules of digital communication. The QPSK modulator unit will be modelled using HDL code and simulation is done using Modelsim 10.d simulator followed by synthesis and FPGA implementation of the design using Xilinx ISE design suite using Spartan-6 FPGA kit.