Low noise analog front-end circuit for high-speed high resolution digitizer for time-domain applications

An analog front-end circuit of analog-to-digital converter (ADC) is one of critical parts, which defines a performance of high-speed signal acquisition boards/systems. It directly influences following characteristics of system: frequency response, noise floor, transient response, over drive recovery. The analog front-end circuit for 500 MSPS 12-bit ADC has been developed, and it features best-in-class combination of signal bandwidth, noise, and transient response suitable for time domain applications. The developed circuit does not saturate in defined input signal range, delivers high performance characteristics, demonstrates low power consumption, and occupies small area on PCB. The reactance of FR-4 PCB traces and that of active components' are accounted in circuit design. The circuit allows a practical utilization of full ADC dynamic range. The paper includes: requirements for analog front-end circuit, an overview of circuit architecture alternatives and their simulation results, an overview of circuit implementation, an explanation of circuit operation, description of circuit evaluation problems and way they have been solved, laboratory measurement results and serial production statistics.