A General Digital Predistortion Architecture Using Constrained Feedback Bandwidth for Wideband Power Amplifiers

Digital predistortion (DPD) is one of the most effective techniques to mitigate the distortions caused by power amplifier (PA) nonlinearity and memory effects. As the input signal bandwidth increases, the required bandwidth on the DPD feedback channel becomes even larger, i.e., normally five times the signal bandwidth. However, the DPD feedback bandwidth is often restricted by the nonideal electronic components, e.g., the anti-aliasing filter and associated circuits, which therefore introduce bandwidth mismatch between the PA model basis functions and the feedback signal, and thus degrade the linearization performances of the DPD. This paper presents a general DPD architecture for wideband PA systems with constrained feedback bandwidth. By using linear operations to cancel the bandwidth mismatch between the proposed model and the PA feedback signal, the full-band PA model parameters can be estimated with bandwidth-limited observations. This estimated PA model is subsequently used with the PA input signal to extract the DPD function by applying the direct learning algorithms. The proposed DPD architecture reduces the feedback bandwidth to less than two times that of the input signal, while it maintains its linearization performance, as in the full-band case. Experiments are performed on the 20- and 100-MHz long-term evolution advanced signals to demonstrate the effectiveness of the proposed PA behavior modeling and DPD linearization performances with limited feedback bandwidth.