An FPGA-based multi-core system for synthetic aperture radar data processing

Often graphic processing units (GPGPUs) are used for data processing as the range-Doppler algorithm is computationally expensive and highly parallel. However, GPGPUs may not be an appropriate solution for applications with strictly constrained space and power requirements. In this paper, we implemented a FPGA-based multi-core system for SAR data processing with Range-Doppler algorithm. Our system consists of 4 Xilinx Virtex-6-550T devices with speed grade -1 and several off-chip memory devices. We design a scalable multi-core processor consisting of 16 processing elements and a 2D-Mesh network-on-chip on the FPGAs. Our system calculates real-time SAR raw data in pipeline, and can acquire a 256 level gray SAR images containing 2048×4096 pixels in 12.03 second at the speed of 130MHz. We measure the power of the whole system is about 85 watt.