Fast time-domain noise simulation of sigma-delta converters and periodically switched linear networks

This paper presents fast time domain methods for computer simulation of electrical noise and sampling-clock jitter in sigma-delta data converters and in general periodically switched linear networks, such as, switched capacitor filters at circuit macro-model level. The proposed methods have been implemented in a computer program SDNoise. In this paper, examples of thermal noise simulation in a switched capacitor filter and in a sigma-delta A/D converter are given. Examples of sampling-clock jitter simulation are also given for the sigma-delta A/D converter in the case when it is used to convert baseband signal, and in the case when it is used as IF front-end to convert IF signal by sub-sampling technique. Simulation time in the order of minutes is shown for 74 k clock-cycle data of the sigma-delta A/D converter when thermal noise and clock jitter are present.