Flip chip bonding reliability of advanced glass ceramic chip size package

In order to realize high-density wiring and to increase the reliability of chip interconnection to printed wiring boards (PWBs), we have developed glass ceramic chip size packages (CSPs). A 64M-DRAM chip was connected to the glass ceramic substrate via Au bumps by a flip chip bonding technique with high interconnection reliability, and the substrate was mounted on a PWB via solder ball bumps. To evaluate the reliability of the glass ceramic CSP, a thermal stress simulation was performed and the analysis indicated that thin glass ceramic CSPs were highly reliable. This finding was supported by thermal cycle testing using actual glass ceramic CSPs and identically structured alumina CSPs. The thin glass ceramic CSPs passed 1000 cycles, although failures were detected on the alumina CSPs between 500 and 1000 cycles. These failures were analyzed and it was confirmed that fatigue fractures occurred in the solder ball bumps due to coefficient of thermal expansion (CTE) mismatch and substrate rigidity.