Accurate CMOS switched-current divider circuits

This paper presents a highly accurate current divider using switched-current (SI) technique. The circuit accurately divides an input current by two with 3 cycles at each iteration. The accuracy of the division increases as the number of iterations increases. In practice, however, the accuracy is limited due to the clock-feedthrough errors. The issue of accuracy limitation is addressed. The extension to array structures for low-power/low-voltage A/D and D/A converter circuit designs is also discussed.