A comparison of monolithic background calibration in two time-interleaved analog-to-digital converters

Two background calibration methods for time-interleaved pipelined analog-to-digital converters are described and compared. One approach uses an extra ADC channel and analog calibration circuits; the other uses extra resolution and digital calibration circuits. Both approaches have been integrated in a 1-/spl mu/m CMOS process. The strengths and weaknesses of the two approaches are presented, and the measured data are compared.