Transimpedance Limit Exploration and Inductor-Less Bandwidth Extension for Designing Wideband Amplifiers

This brief studies the transimpedance of the regulated cascode (RGC) structure and develops a multilevel active feedback (MLAF) structure to build an inductorless CMOS differential transimpedance amplifier (TIA). The proposed TIA consists of an input stage, a single-to-differential circuit, a gain stage, and an output buffer. The input stage adopts the RGC structure of which transimpedance is theoretically characterized and numerically analyzed to determine design parameters. In the gain stage, the MLAF structure in a hierarchical feedback topology is investigated to increase the bandwidth without inductor peaking. The proposed differential TIA was simulated at the 180-nm, 90-nm, and 28-nm CMOS technologies to verify our design methodology. In addition, the TSMC 180-nm CMOS technology was employed to implement the proposed TIA with a core size of 0.05 mm², a bandwidth of 7.2 GHz, and a differential transimpedance gain of 1.8 kΩ. Comparing with conventional TIAs, the proposed TIA exhibits the least hardware cost and fairly good performance for applications of 10-Gbit/s optical communications.