Analysis of CMOS low-dropout regulator — Power-supply rejection ratio

This paper provides a detailed analysis of the power-supply rejection ratio (PSRR) of low-dropout (LDO) regulator. The paper includes circuit modeling of a generic LDO with signal injection at its supply. Based on the modeling, the transfer function of PSRR is derived. Thorough analysis of the locations of poles and zeros obtained from the transfer function is carried out, and then recommendations to improve PSRR are given. The proposed model and the achieved results are verified by circuit simulations using BSEVI models of a commercial CMOS 0.35-μm technology. The results reveal good agreement between the modeling and the PSRR property of a LDO.