FPGA implementation of a reconfigurable image encryption system

This paper presents the hardware implementation of a cryptographic algorithm using a matrix approach, named ESCA (encryption by synchronization of cellular automata). The ESCA system is a symmetric key algorithm, which is based on the rule-90 cellular automaton to implement all their components. In the hardware implementation of the ESCA system was used the soft processor core Microblaze in a Virtex-5 VC5VLX110T FPGA. With this embedded system we can have a reconfigurable encryption system that allows to the user select among different configurations without the need to program the FPGA every time. With the different options to configure the ESCA system, we may increase the security or have a customized system for a faster performance. With this implementation we carry out the encryption of grayscale and RGB color images. In addition, a sparse matrix format was implemented to reduce the latency, and to prove the security of the algorithm, different tests were applied exhibiting good results.