Fully On chip area efficient LDO voltage regulator

A novel full on-chip, area efficient low dropout linear regulator is presented in this paper. This LDO is designed with a recycling folded cascode error amplifier that offers very good stability and a load regulation of 6.760μV/mA. A refined frequency compensation scheme is used which maintains LDO stability over entire load current range i.e. 0–100mA and fast transient response without any necessity of output capacitor. The overshoot/undershoot in the output voltage under the extreme load transients are 195.3mV /71.7mV. The area of the presented LDO is greatly reduced due to removal of on-chip high output capacitance. The area of presented LDO is only 0.05 mm2. The LDO presented requires a bias current of 70μA and 200mV dropout voltage and is designed in 180nm technology.