Analysis and design of CMOS charge pump for EEPROM

A CMOS charge pump circuit, which can be applied in electrically erasable programmable read-only memory (EEPROM), is introduced in this paper. The performance including output voltage, rise time, power as well as changing pattern of output voltage versus load current of the traditional Dickson charge pump (TDCP), improved charge pump (ICP), and second improved charge pump schematic (NCP-2) are analyzed and compared. The simulation results show that the output voltage of NCP-2 is higher than other two charge pump circuits in three process corners. Meanwhile, the power consumption of NCP-2 is also much higher than other two circuits.