Electronic board modeling by the means of DELPHI compact thermal model of components

Board-level simulation considers the challenging process of analysing the impact of the vicinity of high and medium powered devices on the sensitive ones. This level of design is often considered in the industry sector as an unnecessary luxury. This damaging approach is becoming untenable with the rising use of miniaturized high-powered devices and High density Interconnection electronic board, which intensifies the coupling effect of neighbouring components. So, perform board-level thermal simulation at the earliest stage of the design process makes sense today, more than ever. To minimize the computation times, from days to minutes, the concept of compact thermal model was defined in 1996, by the European consortium DELPHI¹ Unfortunately, DELPHI project ended with a methodology restricted to steady-state compact thermal model for mono-chip electronic component. Emerging problematic such as multi-chips module or transient thermal model were not addressed, which remains today for worldwide companies a non-trivial challenge. Since 2009, Thales is implementing these missing methods. The present paper summarizes the comparison of a “state-of-the-art” numerical detailed model and its deducted compact model with the help of infrared experimental results in order to promote a modelling guideline. (¹)DEvelopment of Library of Physical model for an Integrated design environment.