Optimization of the SIFT key algorithms on multi-core DSP systems

This paper presents a method for improving the key SIFT algorithm on multi-core DSP system. The hardware system has 8 cores and abundant resources and it suits the calculation of quantity of big data SIFT algorithm. DSP platform and CCS development environment inter-communicate by simulation to carry out SIFT key algorithm transplant and optimization. The SIFT algorithm and data divided into ma n y blocks execution at the same time on multi-core and this way is the most important optimization characteristics in this paper. Data Partitioning, Algorithm Module Partition, Inter-processor Communication are the present paper research key points. Experimental results show that the speed of SIFT key algorithm obvious improvement.