On designing circuit primitives for cortical processors with memristive hardware

Cortical processors, inspired by the neocortex, offer a promising paradigm to build the next generation of massively parallel, energy efficient, real-time information processing systems. Efforts in realizing a scalable cortical processor in hardware are hindered by stringent design requirements, including high degrees of connectivity, dense weight storage, robustness to variability, and complex hierarchical structures. Emerging memristive devices are proven to be effective in emulating the plasticity characteristics of the neocortex, including synaptic and non-synaptic plasticity, within a single device. In this paper, we review various approaches in designing and realizing memristive hardware primitives for cortical processors such as neurons, synapses, training functions. Scalability and associated challenges for large-scale network realization are also reviewed. Further, we discuss the application space of such processors.