Efficient Frequency Domain Zadoff-Chu generator with application to LTE and LTE-A systems

This paper presents a configurable and optimized hardware architecture for computing Zadoff-Chu (ZC) complex sequences in the Frequency Domain (FD). It is a hardware-efficient and accurate architecture for computing ZC sequences in real-time. The architecture is mainly based on the CORDIC algorithm for computing complex exponentials using only shift and add operations. Due to transformations applied to the Zadoff-Chu equation it is possible to eliminate the use of multipliers with non-constant terms. This hardware architecture is employed by the Physical Random Access Channel (PRACH) in LTE and LTE-A systems during the reception and detection of random access preambles. Its main advantage is that it eliminates the need for storing a large number of long complex ZC sequences.