The challenges of analog circuits on nanoscale technologies

As Systems on Chip increase the portions of systems that are being integrated, the number and variety of analog/mixed signal circuits that are needed on a single chip are growing. At the same time, for reasons of cost, performance, and power the manufacturing of these nominally digital die is being scaled to ever smaller feature sizes. Unfortunately scaling to smaller devices does not deliver power or performance benefits for classical analog circuits. How are we going to bridge the gap between these two trends and keep Moore's Law alive?