A novel GaAs MESFET for suppression of low temperature side gating

The key technology for GaAs ICs and LSIs at low-temperature operation (-30 degrees C) is the suppression of side gating of MESFETs. A novel FET structure for suppressing the side gating that has been obtained by analysis of the surface depletion layer of FETs is proposed. Two improvements has been introduced. One is a p/sup +/ isolation layer. This layer is surrounded by an n-type layer which is biased in minimum negative potential of the circuit. The other is a control gate on the thin SiO/sub 2/. These improvements suppress both surface and bulk side gate current.<>