Novel High Gain Low Noise CMOS Instrumentation Amplifier for Biomedical Applications

This work describes a novel technique of designing a high gain low noise CMOS instrumentation amplifier for biomedical applications like ECG signal processing. A three opamp instrumentation amplifier have been designed by using two simple op-amps at the two input stages and a folded cascode opamp at the output stage. Both op-amps at the input and output are 2-stage. Most of the previous or earlier designed op-amp in literature uses same type of op-amp at the input and output stages of instrumentation amplifier. By using folded cascode op-amp at the output, we had achieved significant improvement in gain and CMRR. Transistors sizing plays a major role in achieving high gain and CMRR. To achieve a desirable common mode rejection ratio (CMRR), Gain and other performance metrics, selection of most appropriable op-amp circuit topologies & optimum transistor sizing was the main criteria for designing of instrumentation amplifier for biomedical applications. The complete instrumentation amplifier design is simulated using Cadence Spectre tool and layout is designed and simulated in Cadence Layout editor at 0.18μm CMOS technology. Each of the input two stage op-amp provides a gain and CMRR of 45dB and 72dB respectively. The output two stage folded cascode amplifier provides a CMRR of 92dB and a gain of 82dB. The design achieves an overall CMRR and gain of 92dB and 67db respectively. The overall power consumed by instrumentation amplifier is 263μW which is suitable for biomedical signal processing applications.