Multi-stage FIR filter design for portable digital spectrum analyzers

In this paper proposed is a cost-efficient architecture of FIR filter for portable digital spectrum analyzers. In order to reduce the hardware complexity, we split an FIR filter into multiple stages, which share the hardware resources such as multipliers and adders with one another. It makes sense because portable spectrum analyzers should be implemented with very low hardware costs and the real-time working is not mandatory in the systems. The proposed architecture can reduce the hardware costs to a quarter of existing FIR filter's complexity.