Analog signal processing in deep submicron CMOS technologies using inverters

Analog signal-processing in deep sub-micron technologies poses many challenges arising from both low supply voltage and intrinsic voltage-gain of short channel devices. Class-AB CMOS transconductance obtained by a pair of complementary transistors is a widely used power efficient building block because it has linear v - i characteristics. This is topologically the same as the logic inverter of CMOS digital systems. This block enables the basic signal-processing operations of addition, subtraction, scaling and integration. Replica-circuits are used to keep the large process, voltage and temperature (PVT) variations under control. Thus we can perform analog signal-processing at a level of precision required for designing high-speed data communication systems. This paper discusses this in a canonical fashion. Simulation results using device models for 65 nm CMOS process are presented to validate these ideas.