Conducted-emission modeling for a high-speed ECL clock buffer

Total voltage sources and Thevenin equivalent circuits are derived by measurements and simulations using IBIS models to characterize the conducted emissions from ICs. The constructed noise source model for a test IC is applied in system-level simulations and the calculated far field radiation is validated with measurements. The agreement between simulated and measured results demonstrates the effectiveness of the constructed model for characterizing the conducted emissions from an IC's I/O pins.