Behavior modeling for whole-chip HV ESD protection circuits

This paper reports a new behavioral modeling technique for HV diode and silicon controlled rectifier (SCR) based electrostatic discharge (ESD) protection structures using Verilog-A language. Accurate models were developed for various HV ESD diode and stacked SCR power clamp implemented in a foundry BCD30V process, which were validated by circuit simulation and ESD measurement.