A 4.7-Gb/s imaging receiver with adaptive spectrum re-balancing equalizer for wireless optical communications

Imaging Optical Receivers (IOR), in which a single photodiode (PD) is replaced by an array of small on chip PDs followed by a matrix of switches, can reduce the received ambient light noise, multi-path distortion, and allow electronic Line Of Sight (LOS) detection and tracking of the transmitted signal. However, such receivers experience a change in the total input capacitance introduced to the front-end circuitry depending on the number of activated PDs in LOS with the transmitter, mandating adaptive equalization in the receive side. In this work, a high speed imaging receiver is reported in IBM 130 nm CMOS technology. The receiver is formed of a 3×3 matrix of high speed Spatially Modulated Light detectors (SML) followed by a trans-impedance amplifier, an adaptive equalizer and a limiting amplifier. For one activated PD, the chip is capable of communicating at speeds up to 4.7-Gb/s with BER = 10^-10 and sensitivity of -3.5 dBm using λ =850 nm modulated light. For 9 activated PDs, corresponding to an input capacitance of 11.5 pF, the chip is capable of communicating at speeds up to 2-Gb/s for BER = 10^-12 and an optical sensitivity of -5 dBm. The power consumption of the imaging receiver is 97 mW from a single 1.5 V dc supply and the total die area is 1400 μm × 870μm.