Improving yield through elimination of nitride stringers in 180nm EEPROM process technology

A SiN stringer defect generation mechanism in a 180nm dual poly EEPROM technology is presented. It is generated from residual nitride in STI field oxide steps created from multiple masking steps introduced to fabricate the stacked poly bit cell. These stringer defects then peel away during subsequent clean steps resulting in interlayer dielectric voids. The voids later fill in with tungsten during the contact module creating a leakage path between adjacent bit-lines. After identifying the failure mechanism and understanding the process and layout sensitivities, few approaches were evaluated to resolve the defect. One approach was to try to eliminate or reduce the occurrence of the recess in the field through improved overlap design rules of poly mask processes. A second approach was to plasma etch the stringers through an isotropic spacer etch process, and the last approach was to “bury” the stringers by covering them with oxide. While optimizing the spacer nitride etch to eliminate the stringers showed some improvement the approach of “burying” the stringers under CoSi block oxide was found to be more robust. This was done through generating CoSi block layer over the field recess areas which “buried” the stringers and prevented their displacement in subsequent processing steps. This solution did not require making changes in the selected process integration scheme and was accomplished through one mask revision. Furthermore, this approach also had no impact to process recipes or parametric performance.