A 3–10 GHz ultra wideband 130 nm CMOS low noise amplifier

An ultra wideband (UWB) low nose amplifier (LNA) is presented in this paper. It is designed to operate in the complete range (3-10 GHz) as defined by the US Federal Communications Commission (FCC) using the 130 nm CMOS technology process. The main goals of the design are low noise, high linearity and low variance of the gain over the operating frequency range. To achieve this, the two stage topology is used that yields the following results: input reffered intercept point (IIP3) of up to 2.30 dBm and forward gain (S₂₁) of 14.73 dB with the variation of ±1.15 dB over the mentioned range. Maximum noise factor (NF) is less than 4 dB and the input return loss (S₁₁) is less than -10 dB. The power dissipation is 32.50 mW for the supply voltage of 1.20 V. The process, voltage and temperature (PVT) variations are analysed and the results are discussed in the paper. The results given are obtained through the schematic level simulations using Spectre Simulator from Cadence Design System.