Dielectric defects controlling instability in InGaAs n-MOSFETs with Al2O3/ZrO2 gate stack

Instability under positive bias stress (DC and AC) in InGaAs channel nMOSFETs with a a 1nmAl₂O₃/5nmZrO₂ gate stack is studied. It is determined that the threshold voltage shift (ΔV_T) during stress is primarily caused by a recoverable electron trapping at pre-existing defects, which are located pre-dominantly in the Al₂O₃ interfacial layer (IL). Generation of new electron trapping defects is found to occur in the IL, in the region close to the substrate, while trap generation in the high-k dielectric is negligible. The ΔV_T recovery impacts the degradation dependency on the stress duty cycle and frequency.