A new aspect of plasma-induced physical damage in three-dimensional scaled structures — Sidewall damage by stochastic straggling and sputtering

Increasing demands for higher performance LSIs require three dimensional (3D) structures such as a FinFET and 3D integration package, and a 3D NAND flash memory. We focused on damage creation mechanism in such structures during plasma etching-plasma-induced physical damage (PPD). Compared to PPD in planar FETs (e.g. Si recess), atomistic simulations predicted that, during etching of FinFETs, both “straggling” of impinging ions in the bulk and “sputtering” of species at the reacting surface created defects in the bulk fin. The damage layer formation in the fin structure was modeled on the basis of range theory. A molecular dynamics simulation was performed in a Si fin structure to verify the proposed mechanism. Created defect structures by these mechanisms were confirmed to play the role of a carrier trap site by a quantum mechanical calculation. The obtained results showed that ions with lighter masses and higher incident energies induced a larger amount of damage in the bulk fin. Since they are the intrinsic nature of plasma etching, both stochastic straggling and sputtering should be implemented in the PPD evaluation of 3D devices.