An all-digital phase-locked loop compiler with liberty timing files

In this paper, an all-digital phase-locked loop (ADPLL) compiler with liberty timing files (.lib) is presented. The proposed digitally controlled oscillator (DCO) frequency range estimation algorithm can accurately compute the frequency range of the DCO with only liberty timing files. Therefore, the proposed ADPLL compiler can generate a wide frequency range and monotonic response DCO circuit according to the user input specifications. The generated DCO circuit is designed with standard cells. Thus, the design turnaround time for the ADPLL can be greatly reduced. The proposed ADPLL compiler is verified with SPICE circuit simulator. The maximum frequency estimation error is smaller than 5.92% in 90nm or 65nm CMOS processes.