Embedded system for area measurement using FPGA

Area measurement is intensively used in the industry to classify objects by its size. This paper presents the hardware design of an embedded system for area measurement using image processing by considering high accuracy, high reliability and minimal time processing. In this case, the hardware implementation algorithms for image processing are described using generic structural VHDL, synthesized on the FPGA EP2C70F896C6N, and verified using an image acquisition system based on the D5M camera and the DE2-70 development kit.