Investigation of transformer winding architectures for high voltage capacitor charging applications

Transformer parameters such as leakage inductance and self-capacitance are rarely calculated in advance during the design phase, because of the complexity and huge analytical error margins caused by practical winding implementation issues. Thus, choosing one transformer architecture over another for a given design is usually based on experience or a trial and error approach. This work presents equations regarding calculation of leakage inductance, self-capacitance and AC resistance in transformer winding architectures, ranging from the common non-interleaved primary/secondary winding architecture, to an interleaved, sectionalized and bank winded architecture. The analytical results are evaluated experimentally and through FEM simulations. Different transformer winding architectures are investigated in terms of the losses caused by the transformer parasitics for a bidirectional high-voltage (∼1500 V) flyback converter used to drive a dielectric electro active polymer based incremental actuator. The total losses due to the transformer parasitics for the best transformer architectures is reduced by more than a factor of ten compared to the worst case transformer architectures.