Study on exposure strategy to minimize optical propagation losses in silicon waveguides fabricated by electron beam lithography

Because of its beneficial material properties and the availability of mature CMOS-compatible fabrication processes Silicon-on-insulator (SOI) has become the core material for integrated silicon photonics [1]. The most basic components for all integrated silicon photonic circuits fabricated on SOI substrate material are silicon waveguide structures used to guide the light through the photonic circuit. One key issue is the fabrication of low-loss waveguides as optical propagation losses (OPLs) not only limit device performance in terms of overall insertion loss but can also contribute significantly to the overall power consumption of an integrated silicon photonic device.