Step stress aging of plated wire memories

A rate of 0.3 failures per billion hours or less is desirable for memory components in large integrated arrays. This unusually stringent requirement complicates the determination of lifetime from accelerated aging studies. The value and limitations of step stress aging techniques are discussed in terms of experimental results obtained using plated wire memory arrays designed to withstand the high ambient temperatures required for accelerated aging. Step stress aging measurements alone are insufficient for confident lifetime prediction. Therefore, longer term measurements at lower temperatures must also be made to establish the validity of the lifetime extrapolations. It is essential to protect the plated wires against corrosion. Given proper protection a shelf life in the hundreds of years is forecast. The importance of duty cycle on lifetime in exercising the memory is discussed and the results of aging under extreme pulsed magnetic field stress conditions are reported. Criteria for wire selection, with long term stability in mind, are discussed.