The design of a multi-bit sigma-delta ADC modulator

Sigma-delta modulation is a superior technique to realize A/D converter with high resolution. This paper proposes a new method to design a low-cost, high-performance and third-order sigma-delta modulator whose structure is three-bit quantization CIFF (cascade of integrators, feed forward form). It combines the high-speed and data processing ability of FPGA to achieve high accuracy of sigma-delta ADC. The diagram of each part in circuit is given, and system modeling and simulations are carried out in this paper. The results show that, the modulator with multi-bit quantization has a higher SNR.