A new area efficient SURF hardware structure and its application to Object tracking

SURF is a well-known scale- and rotation-invariant feature detection algorithm, and it has been widely used for many object tracking algorithms. But it is hard to implement it in real time due to its high computational complexity. In this paper, the hardware architecture of SURF IP was proposed for real time operation. Especially its block memory usage was greatly reduced by partitioning the SURF into several Sub-IPs using external memory, and the rapid data transfer among Sub-IPs was performed using DMAs. To justify validity of the proposed hardware IP, we developed a simple object tracking system using the SURF IP. As a result of FPGA Synthesis using Xilinx Zynq-7020 which includes ARM Cortex-A9, AXI, DMA and DRAM controller, it occupies 41,383LUT and 90.32Kbyte block memory, giving performance of 42 frames per second for the tracking object of 300x300 pixels. Our implementation is intended to be used in embedded systems in which area is highly limited.