FPGA implementation of less area overhead radix — 4 Threshold Viterbi decoder with trace forwarding for OFDM based cognitive radio

In the literature, the Error Correcting Codes [ECC] are utilized in modern Communication system to make high speed data transfer over the channel and transferred data reappear reliably at the receiver end. Viterbi decoder is the best solution in maximum likelihood sense to decode for forward error correction of convolutionally encoded messages. In this paper, we have proposed radix - 4 hard decision threshold Viterbi decoder with forward tracing which occupies less area overhead for encoding the Non-Recursive Non-Systematic Convolution codes. The proposed one is used to develop a Multiband Orthogonal Frequency Division Modulation [MB-OFDM] based wireless transceiver decoding / demaping Module for Cognitive Radio using software defined radio. In this paper by exploiting the branch regularity in radix 4, only a half of branch metrics need to be computed, while other metrics can be derived from the computed branches. Hence the branch metric computation of the radix-4 butterfly is reduced by a factor of 2. In addition to that the amount of computation and storage memories are reduced by keeping some of the best or most-likely states with respect to the keen value for the flexible threshold Viterbi decoder. Also, to avoid the use of Survivor Memory Unit (SMU), we proposed forward tracing that determines the decision bits during the calculation of the most likely paths itself. Using the above methodologies the proposed viterbi decoder occupies less area and operates at higher speed in terms of 18% increase than the conventional decoder. Hence the proposed viterbi Decoder can be used in decoding module for MB-OFDM based Cognitive radio.