Dual-band RF receiver for GPS and compass systems in 55-nm CMOS

A fully integrated dual-band RF receiver with a low-IF architecture is designed and implemented for GPS-L1 and Compass-B1 in a 55-nm CMOS process. The receiver incorporates two independent IF channels with 2 or 4 MHz bandwidth to receive the dual-band signals around 1.57 GHz respectively. By implementing a flexible frequency plan, the RF front-end and frequency synthesizer are shared for the dual-band operation to save power consumption and chip area, as well as avoid any LO crosstalk. A digital automatic gain control (AGC) loop is utilized to improve the receiver's robustness by optimizing the conversion gain of the analog-to-digital converter (ADC). While drawing about 20 mA per channel from a 1.2 V supply, this RF receiver achieves a minimum noise figure (NF) of about 1.8 dB, an image rejection (IMR) of more than 35 dB, a maximum voltage gain of about 110 dB, a gain dynamic range of more than 68 dB, and an input-referred 1 dB compression point (P1dB) of about −36.5 dBm with an active die area of 1.5 ×1.4 mm² for the whole chip.