A low temperature Ohmic contact process for n-type Ge substrates

With continuous demands for high performance and low power consumption CMOS devices, high mobility channel materials have been investigated for future end-of-roadmap electronic devices [1]. Among high mobility semiconductors, Ge channel have been focused as a strong candidate for both n- and p-type channel devices owing to high electron and hole mobility. To benefit the high channel mobility, low resistivity Ohmic contacts are essential for source and drain regions [2]. Commonly, an intuitive approach to achieve low Ohmic contact is to adopt heavily doped source and drain junctions, so as to increase the tunneling probability at metal/semiconductor interfaces. However, doping for Ge substrate suffer from poor solubility of dopants, large diffusion coefficient, incomplete activation of dopants [3]. Also, a strong Fermi-level pinning near the valence band of Ge results in large Schottky barrier height for electrons, which eventually leads to high contact resistance for n-type Ge channel [4]. This work presents a novel approach to obtain Ohmic characteristics with low temperature process on n-type Ge substrate without ion implantation.