An Image Decomposition Strategy Based on GUP's Memory Hierarchy Architecture

This article describes a new image decomposition strategy to use the GPU memory hierarchy architecture more efficiently. An image is decomposed into tiles and the size of each tile is determined based on the size of thread block. In order to avoid loading repeatedly tiles from global memory to shared memory, tiles must overlap each other. The parallel code is specifically tested with dilation operation, which is one of the basic operations in mathematical morphology. Significant performance increases on GPU-based computing platform are seen in some applications, demonstrating the advantage of the proposed parallel scheme.