A VLSI implementation of image processor for facsimile and digital copier

A new image processor is implemented for high-speed digital copiers and facsimiles. The image processor performs CCD and CIS interface, pre-processing, enlargement and reduction of gray level image, and various halftoning algorithms. Implemented algorithms are simple thresholding, fuzzy based mixed mode thresholding, dithering, and edge enhanced error diffusion. Line-by-line pipelined data processing architecture is employed with time sharing access of the external memory. In receiving mode, it converts the resolution of received binary image for compatibility with conventional facsimile. The prototype of image processor was implemented using Laser Programmable Gate Array (LPGA) with O.8 /spl mu/m technology. It was applied to facsimile and the function was verified.